A semiconductor integrated circuit apparatus is known, which includes a built-in testing circuit, an antenna and a radio communication circuit that allow communication with an external device, and a memory that records an ID code and testing results of a circuit to be tested (see Patent Document 1). A power generation circuit generates power using a carrier inputted from outside. The semiconductor integrated circuit generates power using a radio signal from outside, compares an ID code sent from outside with an own ID code, receives a command on the semiconductor integrated circuit and transmits testing results of the circuit to be tested to outside.
Furthermore, a semiconductor integrated circuit is known, which operates through an inner circuit (see Patent Document 2). The semiconductor integrated circuit includes a testing section that tests the inner circuit and a radio interface module that is electrically connected to this testing section and performs radio communication therewith.
Furthermore, a semiconductor integrated circuit including a testing circuit is known, which supplies a testing signal for testing a circuit to be tested from the testing circuit to the circuit to be tested and determines whether the circuit to be tested is good or bad based on an output signal outputted from the circuit to be tested to which the testing signal is supplied (see Patent Document 3). The semiconductor device includes a power supply capacitor that stores a predetermined amount of charge to drive the testing circuit after at least the testing circuit supplies the testing signal to the circuit to be tested until the testing circuit determines whether the circuit to be tested is good or bad.
Furthermore, a semiconductor integrated circuit is known, in which inner circuit testing means for testing a calculation processing circuit which performs predetermined calculation processing as a circuit to be tested is integrally formed with the calculation processing circuit (see Patent Document 4). The inner circuit testing means receives a time-divided testing input signal from outside, develops the testing input signal into parallel signals, inputs the parallel signals to the circuit to be tested, time-divides the testing output signal outputted from the circuit to be tested and outputs the time-divided signals to an external terminal. A first RAM stores the testing input signals parallel-developed by the inner circuit testing means and outputs these testing input signals to the circuit to be tested at a system clock frequency used during normal operation of the circuit to be tested. A second RAM can be accessed independently of the first RAM to which the testing output signal outputted from the circuit to be tested is inputted at the system clock frequency.
Furthermore, a semiconductor apparatus is known, which includes a memory circuit having a predetermined storage capacity, a testing circuit that tests the presence or absence of a defect in the memory circuit, and a power supply circuit that changes an inner supply voltage of the memory circuit (see Patent Document 5). The supply voltage control circuit is incorporated in the testing circuit and sends a control signal to change the inner supply voltage of the memory circuit to the power supply circuit. The testing control circuit is incorporated in the testing circuit, temporarily stops testing in accordance with a control signal from the supply voltage control circuit and resumes testing after the inner supply voltage changes.
Patent Document 1: Japanese Laid-open Patent Publication No. 2005-30877
Patent Document 2: Japanese Laid-open Patent Publication No. 2007-78407
Patent Document 3: Japanese Laid-open Patent Publication No. 2005-283389
Patent Document 4: Japanese Laid-open Patent Publication No. 10-339765
Patent Document 5: Japanese Laid-open Patent Publication No. 2001-266596
When the semiconductor integrated circuit apparatus is a package or wafer, the semiconductor integrated circuit apparatus can be tested by connecting an external testing apparatus to the semiconductor integrated circuit apparatus. However, the external testing apparatus involves a problem that it is expensive, requires many man-hours, a testing cost tends to increase and it is not possible to test the semiconductor integrated circuit apparatus after shipment.
In contrast, the semiconductor integrated circuit apparatus including the built-in testing circuit and the power generation circuit that generates power using a carrier inputted from outside requires no external testing apparatus. However, power generated by the power generation circuit is small and testing includes many testing items. Testing all testing items may lead to an increase in power consumption and testing accuracy deteriorates due to power shortage.